FPGA Design Engineer, Staff

March 26

🏢 In-office - Bay Area

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Logo of d-Matrix

d-Matrix

Disrupting AI Compute, Breaking the AI Barrier

51 - 200

đź’° $110M Series B on 2023-09

Description

• Design and verify FPGA-based solutions for d-Matrix AI inference accelerator management • Define FPGA microarchitecture specifications and collaborate with stakeholders to ensure alignment with project requirements. • Develop resilient dual boot architecture for multi-core multi chiplet booting • Design and implement hardware and software modules for platform power management, health monitoring, and telemetry data acquisition. • Interface with host server BMC through SMBus mailbox with management protocol overlays such as MCTP, PLDM and SPDM • Integrate RISC-V CPU cores and related firmware into FPGA designs. • Develop eFuse controller within the FPGA • Design and integrate a secure boot solution adhering to NIST standards within the FPGA to enable secure booting of d-Matrix accelerator chiplets • Collaborate with cross-functional teams to ensure seamless hardware-software integration and support inference accelerator hardware bring-up and troubleshooting. • Author Python scripts for hardware testing and automation

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, Master's degree preferred with a Minimum of 5+ years of experience in FPGA design and verification. • Expertise in hardware design using Hardware Description Languages (HDLs) like Verilog or VHDL • Familiarity with RISC-V architecture and embedded systems development • Understanding of hardware-software integration concepts • Experience with scripting languages like Python for test automation • Strong analytical and problem-solving skills • Excellent communication, collaboration, and teamwork abilities • Thrive in dynamic environments where innovative problem-solving is key • Experience with industry-standard management protocols (MCTP, PLDM, SPDM) • Experience with platform BMC (Baseboard Management Controller) • Knowledge of power management techniques (PMBus) • Knowledge of hardware security and secure boot concepts. • Experience with cloud server architectures and concepts

Benefits

• Offers Equity • Offers Bonus

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