Senior Engineer - High-Speed ADC/RFIC Design
August 28
🏢 In-office - Bay Area
Description
• Involvement in RF Analog team • Drive critical path for product market launch • Engage in schematic capture, IC layout, simulation, product characterization, and support
Requirements
• BSEE minimum, MSEE or PhD desired • 1-4 years of RFIC design in commercial experience • Analog and RFIC design fundamental knowledge in modern CMOS technology • Familiarity with RF, analog, and digital integrated circuits • Expertise in ADC and ADC calibration algorithm, Mixer, TIA, Filter design • Good understanding of CMOS device operation and construction • Familiarity with RF, analog, digital and PLL integrated circuits • Expertise in DCOs/VCOs, ring oscillators, ADPLLs, charge pumps, PFDs, fractional/integer • Good understanding and experience with IC layout and verification • Analytical and disciplined problem solver • Team player with a strong sense of urgency to meet product needs on time • Good communication skills • Hands-on experience making analog, digital and RF measurements using typical laboratory instruments and techniques • Experience using various development tools (Cadence, ADS, EMX, MS Office, etc.)
Benefits
• Comprehensive group health plan • Matching 401(k) • Training reimbursement • Various paid leaves (vacation, sick, holidays, maternity/paternity leave, jury)
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