Staff/Sr. Staff Engineer, RFIC Design
March 11
🏢 In-office - Bay Area
Description
• Partnering with cross functional engineers to develop novel SoC products • Supervising layout activities and post-layout LPE simulations and analysis • Collaborating with RF, analog, digital, test, firmware design engineers • Working on block-level specifications based on product requirements • Designing and validating methods to alleviate circuit impairments • Assisting in test plan design and post-silicon bring-up • Participating in detailed performance characterization and optimization using lab instruments • Presenting to peers and management
Requirements
• MSEE minimum, PhD preferred • 7+ years hands-on experience in high-performance RF, Analog, and Mixed Signal IC design • Technical knowledge of RF CMOS fundamentals and RX/TX RF front-end • Familiarity with RF device modeling and IC layout • Strong problem-solving skills and attention to detail • Excellent written and verbal communication skills • Team player with a strong sense of urgency • Familiar with tools like Cadence Virtuoso, Matlab, Calibre
Benefits
• Several office locations in CA and hybrid remote/office work environment • Balanced workplace for continuous improvement, learning, and collaboration • Opportunity for technical leadership and hands-on contributions
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