Rivos Inc.
Rivos, a high performance RISC-V System Startup targeting integrated system solutions for Enterprise.
51 - 200
Accelerator NOC Logic Design Engineer
August 11
🔄 Hybrid – Bay Area
Rivos Inc.
Rivos, a high performance RISC-V System Startup targeting integrated system solutions for Enterprise.
51 - 200
Description
• Own or participate in the architecture, design, and implementation of NoC in the accelerator • Collaborate with cross-functional teams to ensure successful integration and functionality • Work with performance team on performance analysis and optimization • Work closely with architecture and verification engineers on developing verification plan, checkers, and coverage monitors to verify the functional correctness of the design • Contribute to the development of logic design methodologies and best practices
Requirements
• Excellent skills in problem solving, written and verbal communication, excellent organization skills, and highly self-motivated. • Ability to work well in a team and be productive under aggressive schedules • 2-5 years of experience in Micro-Architecture and RTL design with in-depth knowledge of System Verilog. • Proficiency in high-bandwidth Network on Chip (NoC) architecture, design and implementation. • Strong RTL coding experience in System Verilog and assertions. • Experience with EDA tools for synthesis, simulation, and verification.
Benefits
• Fun, creative, and flexible work environment • Shared vision to build products to change the world
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