RTL Design Engineer
March 16
🏢 In-office - Bay Area
Description
• Design and implement custom RTL modules for the Celestial SoC • Author detailed design specification documents • Collaborate with DV engineers on test requirements to ensure bug free designs • Evaluate performance, area, and power tradeoffs • Drive coverage closure for your designs
Requirements
• 3 or more years logic design experience • RTL design experience with SystemVerilog; familiarity with SVA • Understanding of low power design techniques • Knowledge of / Experience in Network Protocols • Experience designing state machines, data paths, arbiters, and clock domain crossings • Working knowledge of RTL quality assurance tools (Lint, CDC) and LEC preferred • Proficient with scripting languages and task automation • BS plus 3 years relevant experience. MS preferred
Benefits
• Competitive base salary • Generous early-stage equity grant • Health, vision, dental, and life insurance • Collaborative and continuous learning work environment
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