Senior ASIC Design Engineer

September 4

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Description

• Partner closely with the functional R&D teams to develop design specification documentation for individual function blocks, RTL implementation, and system integration, and set up and maintain a verification environment. • Be responsible for tasks including DFT, synthesis, static timing analysis, power estimation, hardware troubleshooting, silicon bring-up, and validation. • Support new product introductions to the high-volume manufacturing process to enable automotive and non-automotive applications.

Requirements

• B.S. or M.S. in Electronic/Electrical Engineering with at least three years of working experience in ASIC design. • Has deep knowledge of one or more of the following domains: Embedded CPU subsystem and architecture; High-speed digital signal processing, computer vision, or machine learning; High-performance serial interface protocols; Low-power design methodology; mixed-signal design; FPGA prototyping. • Strong RTL (Verilog/System Verilog/VHDL) coding skills and hands-on experience in programming languages (Perl/Tcl/Python/C). • Has in-depth knowledge of high-speed digital design, multi-clock domain SOC, and verification; Has a good understanding of ASIC design flow from RTL to silicon. • Familiar with industry-standard EDA tools, advanced silicon processes, and technology nodes for high speed and low power consumption. • Has strong analytical skills and problem-solving ability and is able to provide technical leadership as needed. • A good and reliable team player with strong communication skills. Self-motivated, continually striving for excellence, and can thrive under pressure.

Benefits

• Opportunities to work with strong industry leaders and opportunities to relocate to Silicon Valley. • Competitive compensation package, including stock. • Comprehensive employee benefits program, including medical, dental, vision, life, disability, and more. • Paid time off and paid holidays. • Bonus program eligibility. • 401k, FAS, or HSA.