ASIC/SOC Silicon Physical Design Engineer
March 16
🏢 In-office - Bay Area
Description
• Contribute to silicon design and physical design methodology • Deliver silicon for compute, memory management, connectivity in leading-edge process nodes • Plan and drive reviews for silicon milestones • Work with design services partners and third-party vendors • Own subsystem or chip-level physical design deliverables
Requirements
• RTL-to-silicon experience for ASICs and SOCs • Production-proven experience in physical design tasks • Project experience in collaborating with design, DFT teams • Experience in working with third-party design services partner • Authorized to work in the United States and work from Mountain View Tuesdays-Thursdays
Benefits
• US base salary for full-time position is $120,000 - $400,000 + equity + benefits • Equal Employment Opportunity policy • Access to information subject to U.S. export controls
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