Circuit Design Engineer
August 17
🏢 In-office - San Francisco
Description
• Lead the development and validation of PDKs for new semiconductor process technologies • Collaborate with process and engineering teams to define PDK requirements • Develop and optimize process-specific design rules, device models, and parasitic extraction files • Design test chips and experiments to drive modeling • Create and maintain PDK documentation, including design manuals, application notes, and training materials
Requirements
• Minimum of 5 years of experience in PDK development or circuit design • Proven track record of successfully leading test tape-out chips and analog circuit design • Hands-on experience with device measurement, characterization, and modeling • Proficiency with new or industry-standard EDA tools (e.g., OpenLane, Cadence, Mentor Graphics, Synopsys) • Experience with scripting languages (e.g., Python, Tcl) for automation and tool integration • Strong communication and interpersonal skills, with the ability to work effectively in a collaborative team environment
Benefits
• Medical, Dental, and Vision insurance • Generous Paid Time Off inclusive of Holidays and Sick Time • Visa Sponsorship • Life and Disability Insurance • Paid Parental Leave • 401(k) retirement plan • Weekly Learning & Development opportunities • Commuter Benefits including Parking and Late Night Uber rides from the office • Lunches daily, Dinners 3x per week, Stocked Office Kitchen with Snacks and Spindrifts
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